1. Field of the Invention
The present invention relates to a metallization process for manufacturing semiconductor devices and a system used in the same and, more particularly, to a metal pattern formation process that minimizes corrosion failures in aluminum pattern.
2. Description of the Related Art
A metal pattern formation process for manufacturing semiconductor devices provides electrical interconnection between the devices formed on a semiconductor substrate. The process is carried out by forming a metal material layer on a certain layer over the semiconductor substrate, coating the metal material layer with photoresist, exposing and developing the photoresist according to a predetermined pattern so as to form a photoresist pattern, etching the metal material layer using the photoresist pattern as an etch mask, and removing the photoresist pattern to form a desired metal pattern.
FIG. 1 schematically shows a conventional multichamber-type dry etching system, in which a series of processes, such as etching the metal material layer and removing the photoresist pattern, are carried out. The etching system shown in FIG. 1 is a product of AMT (Applied Materials Technology) Company (Model Name: Centura).
Referring to FIG. 1, the multichamber-type dry etching system comprises a transfer module 12 at its center and a plurality of processing chambers surrounding the transfer module 12. The transfer module 12 has a robot 14 for wafer transfer therein and maintains a constant level of vacuum by a pump (not shown). Each processing chamber is connected to the transfer module 12 via a slit valve 19. The chambers are: load lock chambers 10a, 10b serving as a stand-by area for the wafers before/after a process, a flat-zone aligner 20 for aligning the flat-zone of the wafer for a process, etching chambers 16a, 16b for carrying out the etching process to form the metal pattern, ashing chambers 18a, 18b for stripping the remaining photoresist pattern after the etching process and for passivation, and a cooling chamber 22. Utility lines are connected to each chamber, if necessary.
FIG. 2 shows the structure of the etching chamber 16a shown in FIG. 1, which is a MERIE (Magnetron Enhanced Reactive Ion Etch) type dry etching chamber. The etching chamber employs radio frequency (RF) power to generate plasma for reactive ion etch under low pressure. Additionally, a magnetic coil 38 is further provided along the sidewall of the interior 30 of the etching chamber 16a as shown in FIG. 2. The magnetic coil 38 generates a magnetic field in addition to the electric field generated in the chamber 16a by the RF power. The additional magnetic field focuses the ions around the sidewall of the interior 30 of the chamber 16a and forces the ions into the plasma formed at the center of the interior 30 of the chamber 16a. This increases the density of the plasma and keeps the plasma maintained for a longer period. Therefore, a high etch rate is achieved.
Referring to FIG. 2 in more detail, a wafer 42 is mounted on an electrostatic chuck 46. The electrostatic chuck 46 is installed over a cathode 48 at the center of the interior 30 of the chamber 16a, and a focus ring 44 is provided under the wafer 42 to facilitate the focusing of the plasma. High frequency power is applied on the cathode 48 and the focus ring 44.
A chamber liner 32 is formed at the upper side of the chamber 16a. A gas disperse plate 34 for supplying processing gas over the wafer 42 is provided at the center of the chamber liner 32, and the gas disperse plate 34 is connected to a gas supply line 36.
On the sidewall of the interior 30 of the chamber 16a, a detector 40 for measuring the etch-end point is provided. On the bottom of the interior 30 of the chamber 16a, an exhaust port is provided and is connected to a turbo molecular pump 50 for maintaining a desired level of vacuum in the chamber 16a. 
The wafer 42 has a metal material layer formed on an insulating layer over the wafer, and a photoresist pattern is formed on the metal material layer to form a desired metal pattern. An etching process is carried out on the wafer 42 in the etching chamber 16a shown in FIG. 2 while supplying processing gas. Chlorine (Cl2) gas and boron chloride (BCl3) gas is used as the processing gas for etching aluminum, which is generally used for metal patterns.
However, if gas including chlorine is used as the processing gas in the aluminum pattern formation process, corrosion problems occur in the metal pattern line because aluminum is subject to corrosion by the processing gas.
FIG. 3 is a plane-view of a wafer segment showing corrosion formed on a conventional aluminum pattern line. A metal pattern line 62 is formed on an insulating layer 60 over a semiconductor substrate. Parts of the aluminum pattern line 62 are corroded, which are shown as corrosion portions 69 in FIG. 3. The corrosion portions 69 may expand, resulting in open circuits in the metal pattern line 62. This causes electrical connection failure in semiconductor devices and reduces the production yield.
The corrosion failure in aluminum patterns is known to be caused by HCl which is created by the reaction of vapor with chlorine components in the photoresist and in the sidewall coating of the chamber or with AlCl3, a by-product of the etching process. Although a lot of study has been done on corruption failure, there is still no reliable explanation for the cause and no improvement.
Especially, U.S. Pat. No. 5,545,289 discloses a method of carrying out the ashing step by repeating passivation and stripping in order to reduce the corrosion failure. The ashing step is carried out to remove remaining photoresist patterns after the etching process on the metal material layer. However, the method does not solve the corrosion failure problem because it does not eliminate the cause of the corrosion failure.
Therefore, there has been a need for improving the systems and processes in order to reduce corrosion failure in aluminum pattern lines, thereby improving the reliability and the production yield of semiconductor devices.
It is a feature of the present invention to provide a metallization process that can reduce the corrosion failures in aluminum pattern lines, by suppressing any cause of the corrosion failures in an etching chamber in which the etching process for the metallization is carried out.
Another feature of the present invention is to provide a metallization process that can reduce the corrosion failures in aluminum pattern lines, by suppressing any cause of the corrosion failures in the transfer module and the load lock chamber, which are stand-by areas for the wafers before or after the etching process.
Still another feature of the present invention is to provide a system for forming metal patterns that can reduce the corrosion failures in aluminum pattern lines.
The metallization process for manufacturing semiconductor devices of the present invention comprises the steps of loading a semiconductor wafer into an etching chamber, the semiconductor wafer having a photoresist pattern formed over a metal material layer to be etched, stabilizing the environment in the etching chamber, main-etching the metal material layer to the etch-end point by using the photoresist pattern as an etch mask while supplying etching gas containing chlorine (Cl2) into the etching chamber, over-etching the metal material layer for a certain period of time over the etch-end point to form a metal pattern, purging the etching chamber after the over-etching step, and unloading the water from the etching chamber.
The metal material layer to be etched contains aluminum, and the etching gas contains boron chloride (BCl3) and chlorine (Cl2). The etching chamber is purged by supplying purified nitrogen (PN2) gas into the chamber.
In another aspect of the present invention, the metallization process for manufacturing semiconductor devices of the present invention comprises the steps of loading a semiconductor wafer into a load lock chamber, the semiconductor wafer having a photoresist pattern formed over a metal material layer to be etched, pumping and purging the load lock chamber so as to maintain a certain level of vacuum therein, transferring the semiconductor wafer from the load lock chamber into an etching chamber via a transfer module, the transfer module being maintained at a certain level of vacuum and being purged, etching the metal material layer by using the photoresist pattern as an etch mask while supplying etching gas containing chlorine to form a metal pattern, purging the etching chamber after the etching step, transferring the wafer from the etching chamber into an ashing chamber via the transfer module, the transfer module being maintained at a certain level of vacuum, performing an ashing process on the metal patterns in the ashing chamber, and transferring the wafer from the ashing chamber into the load lock chamber via the transfer module, the load lock chamber being continuously purged and the transfer module being maintained at a certain level of vacuum.
The pressure in the load lock chamber and the transfer module is preferably maintained higher than that in the etching chamber and in the ashing chamber in order to prevent the gas remaining in the etching chamber and in the ashing chamber from flowing back into the load lock chamber and into the transfer module. The pressure in the etching chamber is from 50 to 300 mTorr. The pressure in the load lock chamber and the transfer module is maintained at least higher than 300 mTorr, preferably at 450 mTorr. The pressure in the transfer module can be optimized by connecting a RGA-QMS (Residual Gas Analyzer-Quadrupole Mass Spectrometer) to the load lock chamber and analyzing the movements of the impurities in the load lock chamber while varying the pressure in the transfer module.
In another aspect of the present invention, a system for forming metal patterns in semiconductor devices comprises a transfer module having a robot for wafer transfer therein, the transfer module being continuously purged under a certain level of vacuum, a load lock chamber connected to the transfer module via a slit valve, the load lock chamber being continuously purged under a certain level of vacuum after the wafer is supplied therein, an etching chamber connected to the transfer module via a slit valve, an etching process for the metal pattern formation being carried out therein by using a photoresist pattern as an etch mask, and an ashing chamber connected to the transfer module via a slit valve, an ashing process for removing the photoresist pattern and the etching by-products being carried out therein.
The transfer module and the load lock chamber are purged by using a single purge gas supply line. A RGA-QMS may be provided in the load lock chamber so as to monitor the movement of the impurities contained in the gas remaining in the load lock chamber.
It should be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and merely provide an explanation of the claimed invention.